发明名称 Link aggregation based on port and protocol combination
摘要 A network switch suitable for receiving packets of information from and the packets of information to a communications network includes a plurality of physical ports, packet processing functionality and memory. The packet processing functionality operates on information stored in memory to determine the LAG, from among two or more LAGs, over which a packet received by the switch should be correctly forwarded. The switch memory stores a plurality of LAG tables, each one of which can include one or more entries comprising a physical port number and a packet parameter that are used by the packet processing functionality to determinately identify the correct LAG over which to forward a packet.
申请公布号 US9363167(B2) 申请公布日期 2016.06.07
申请号 US201414322666 申请日期 2014.07.02
申请人 Dell Products L.P. 发明人 Narasimhan Janardhanan Pathangi
分类号 H04L12/28;H04L12/709;H04L12/935;H04L12/931 主分类号 H04L12/28
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A packet forwarding system, comprising: a physical port that is associated with a plurality of link aggregation groups (LAGs); a packet processor coupled to the physical port; and a memory coupled to the packet processor and including instructions that, when executed by the packet processor, cause the packet processor to: receive a packet that includes a physical port identity of the physical port;determine at least one packet parameter of the packet;determine, using the physical port identity and the at least one packet parameter, a first LAG of the plurality of LAGs that are associated with the physical port; andforward the packet over the physical port using the first LAG.
地址 Round Rock TX US