发明名称 |
Printed circuit board and manufacturing method thereof |
摘要 |
The present invention provides a structure of a printed circuit board and a manufacturing method thereof. The method includes: (a) forming a circuit pattern on an insulating layer in which a seed layer is formed; (b) embedding the circuit pattern into the insulating layer by a press method; and (c) removing the seed layer. According to the present invention, a fine pattern may be formed without occurring alignment problem by forming a circuit pattern directly on an insulating layer and reliability of the formed fine pattern may be increased by performing a process of embedding protruded circuits into the insulating layer. In addition, possibility of inferior circuit occurring due to ion migration between adjacent circuits may be reduced by performing over-etching a circuit layer to be lower than a surface of the insulating layer during the etching process of removing a seed layer. |
申请公布号 |
US9532462(B2) |
申请公布日期 |
2016.12.27 |
申请号 |
US201013512271 |
申请日期 |
2010.11.25 |
申请人 |
LG INNOTEK CO., LTD. |
发明人 |
Seo Yeong Uk;Yoon Sung Woon;Kim Jin Su;Nam Myoung Hwa;Lee Sang Myung;Ahn Chi Hee |
分类号 |
H05K1/00;H05K1/09;H05K3/10;H05K3/20;H05K1/02;H05K1/03;H05K3/02 |
主分类号 |
H05K1/00 |
代理机构 |
Saliwanchik, Lloyd & Eisenschenk |
代理人 |
Saliwanchik, Lloyd & Eisenschenk |
主权项 |
1. A method of manufacturing a printed circuit board, the method comprising:
(a) forming a circuit pattern on an insulating layer, wherein a seed layer is formed between the circuit pattern and the insulating layer; (b) embedding the circuit pattern and the seed layer into the insulating layer by a press method such that the seed layer is embedded only at a lower surface of the circuit pattern, and the embedded circuit pattern comprises a top surface with a diameter greater than a diameter of a bottom surface and lateral surfaces directly contacting the insulating layer without contacting a surface of the seed layer; and (c) removing the seed layer; wherein the seed layer is made of a material different from that of the circuit pattern, and wherein the seed layer comprises a top surface having a diameter same as a diameter of the bottom surface of the embedded circuit pattern and lateral surfaces directly contacting the insulating layer without contacting a surface of the embedded circuit pattern. |
地址 |
Seoul KR |