发明名称 TAG ALLOCATION IN A PCIE APPLICATION LAYER
摘要 Embodiments herein provide for tag allocation in a PCIe application layer. In one embodiment, an apparatus operable to interface with a plurality of virtual functions and a plurality of physical functions to process data via the PCIe protocol. The apparatus includes a packet builder communicatively coupled to each of the virtual functions and the physical functions and operable to build packets for non-posted commands from the virtual and physical functions. The apparatus also includes a tag allocator operable to allocate tags from a first set of tags to the packets of non-posted commands from any of the virtual and physical functions employing extended tags when the tags of the first set are available, and to reserve a second different set of tags for remaining virtual and physical functions not employing extended tags until the first set of tags are all allocated.
申请公布号 US2016224487(A1) 申请公布日期 2016.08.04
申请号 US201514610648 申请日期 2015.01.30
申请人 Avago Technologies Limited 发明人 Raghavan Ramprasad
分类号 G06F13/362;G06F13/42 主分类号 G06F13/362
代理机构 代理人
主权项 1. An apparatus operable to interface with a plurality of virtual functions and a plurality of physical functions to process data via the Peripheral Component Interface Express (PCIe) protocol, the apparatus comprising: a packet builder communicatively coupled to each of the virtual functions and the physical functions and operable to build packets for non-posted commands from the virtual and physical functions; and a tag allocator operable to allocate tags from a first set of tags to the packets of non-posted commands from any of the virtual and physical functions employing extended tags when the tags of the first set are available, and to reserve a second different set of tags for remaining virtual and physical functions not employing extended tags until the first set of tags are all allocated.
地址 San Jose CA US