发明名称 Image display device and method for repairing short circuit failure
摘要 The present invention relates to an image display device and a method for repairing a short circuit failure. The present invention is applicable to, for example, an active matrix type image display device using an organic EL device, and a short circuit location between wiring patterns is able to be repaired. In a scanning line WSL or a signal line DTL, a bypass wiring pattern BP for bypassing a region where the signal line DTL and the scanning line WSL intersect with each other is provided. By using the bypass wiring pattern BP, a short circuit location between wiring patterns is repaired.
申请公布号 US9501977(B2) 申请公布日期 2016.11.22
申请号 US201414559091 申请日期 2014.12.03
申请人 Sony Corporation 发明人 Iida Yukihito;Taneda Takayuki;Uchino Katsuhide
分类号 G09G3/3266;G09G3/3233;H01L27/32;G09G3/32 主分类号 G09G3/3266
代理机构 Lerner, David, Littenberg, Krumholz & Mentlik, LLP 代理人 Lerner, David, Littenberg, Krumholz & Mentlik, LLP
主权项 1. An image display device comprising a plurality of pixel circuits arranged in a state of matrix, a plurality of light emitting elements, a plurality of first lines, and a plurality of second lines,wherein the plurality of pixel circuits includes a first pixel circuit and a second pixel circuit adjacent to the first pixel circuit, each of the first pixel circuit and the second pixel circuit includes a first transistor and a second transistor, the first transistor is connected to a gate terminal of the second transistor, the second transistor is configured to supply a driving current to one of the plurality of light emitting elements, the second lines include a first wiring pattern and a second wiring pattern, the first wiring pattern crosses the first line in a region, the second wiring pattern bypasses the region, the second wiring pattern connects a gate terminal of the first transistor of the first pixel circuit and a gate terminal of the first transistor of the second pixel circuit, and the second wiring pattern is connected to the first wiring pattern.
地址 JP