发明名称 Pre-fetching instructions using predicted branch target addresses
摘要 The present application describes a method and apparatus for prefetching instructions based on predicted branch target addresses. Some embodiments of the method include providing a second cache line to a second cache when a target address for a branch instruction in a first cache line of a first cache is included in the second cache line of the first cache and when the second cache line is not resident in the second cache.
申请公布号 US9489203(B2) 申请公布日期 2016.11.08
申请号 US201213711403 申请日期 2012.12.11
申请人 Advanced Micro Devices, Inc. 发明人 Dundas James D.
分类号 G06F9/00;G06F9/38;G06F12/08 主分类号 G06F9/00
代理机构 代理人
主权项 1. A method, comprising: providing a second cache line to a second cache when a target address for a branch instruction in a first cache line of a first cache is included in the second cache line of the first cache and when the second cache line is not resident in the second cache.
地址 Sunnyvale CA US