发明名称 Mixed signal delay locked loop characterization engine
摘要 A mixed signal delay locked loop characterization technique for automatically characterizing a mixed signal delay locked loop is provided. The technique tests the mixed signal delay locked loop using a top-down approach in order to ensure the robustness of the mixed signal delay locked loop. Top-level testing involves testing the performance of the mixed signal delay locked loop in different process corners, and the results obtained from the top-level testing are then used to test sub-components of the mixed signal delay locked loop.
申请公布号 US2004183578(A1) 申请公布日期 2004.09.23
申请号 US20030394789 申请日期 2003.03.21
申请人 CHONG KIAN;LIU DEAN;GAUTHIER CLAUDE R. 发明人 CHONG KIAN;LIU DEAN;GAUTHIER CLAUDE R.
分类号 H03L7/081;(IPC1-7):H03L7/00;G01R27/28;G01R31/00;G01R31/14;G06F17/50;G06F19/00 主分类号 H03L7/081
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