发明名称 Segmenting packet data for ease of writing to memory.
摘要 This invention provides a processor 900 for writing data contained in payload data (1006) of a data packet (1000) to memory, especially for use as the central processing unit of a memory tag (1200). The processor 900 does not include a write buffer. The processor 900 comprises a first register 910 adapted to latch first data corresponding to a segment of the payload data; and a second register 224 adapted to receive second data from the payload data (1006) to enable the validity of the data latched into the first register 910 to be established before data is written to memory. A memory device, a method for writing data contained in payload data (1006), a data packet (1000), a method of writing data into a non-volatile memory and a memory tag are also provided.
申请公布号 GB2421092(A) 申请公布日期 2006.06.14
申请号 GB20040026773 申请日期 2004.12.07
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 FRASER JOHN DICKIN;WENG WAH LOH
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
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