发明名称 Processing of finite automata based on a node cache
摘要 Nodes of a per-pattern NFA may be stored amongst one or more of a plurality of memories based on a node distribution determined as a function of hierarchical levels mapped to the plurality of memories and per-pattern NFA storage allocation settings configured for the hierarchical levels. At least one processor may be configured to cache one or more nodes of the per-pattern NFA in the node cache based on a cache miss of a given node of the one or more nodes and a hierarchical node transaction size associated with a given hierarchical level mapped to a given memory in which the given node is stored, optimizing run time performance of the walk.
申请公布号 US9438561(B2) 申请公布日期 2016.09.06
申请号 US201414252390 申请日期 2014.04.14
申请人 Cavium, Inc. 发明人 Goyal Rajan;Billa Satyanarayana Lakshmipathi;Dikshit Abhishek
分类号 H04L29/06;H04L12/26 主分类号 H04L29/06
代理机构 Hamilton, Brook, Smith & Reynolds, P.C. 代理人 Hamilton, Brook, Smith & Reynolds, P.C.
主权项 1. A method comprising: in at least one processor operatively coupled to at least one network interface, a plurality of memories in a memory hierarchy, and a node cache, in a security appliance operatively coupled to a network: storing a plurality of nodes of at least one finite automaton in the plurality of memories for identifying existence of at least one regular expression pattern in an input stream received via the at least one network interface; andcaching a given node and one or more additional nodes, of the plurality of nodes, stored in a given memory of the plurality of memories at a hierarchical level in the memory hierarchy, in the node cache based on a cache miss of the given node, the one or more additional nodes cached based on a hierarchical node transaction size associated with the hierarchical level, optimizing match performance of the at least one processor for identifying the existence of the least one regular expression pattern in the input stream.
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