发明名称 |
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC DEVICE |
摘要 |
The semiconductor device includes a first insulating layer; a first oxide insulating layer over the first insulating layer; an oxide semiconductor layer over the first oxide insulating layer; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a second oxide insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a gate insulating layer over the second oxide insulating layer; a gate electrode layer over the gate insulating layer; a second insulating layer over the first insulating layer, the source electrode layer, the drain electrode layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer; and a third insulating layer over the first insulating layer, the source electrode layer, the drain electrode layer, and the second insulating layer. |
申请公布号 |
US2016329434(A1) |
申请公布日期 |
2016.11.10 |
申请号 |
US201615144123 |
申请日期 |
2016.05.02 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
ITO Daigo;ISHIYAMA Takahisa;TOCHIBAYASHI Katsuaki;HANAOKA Kazuya |
分类号 |
H01L29/786;G11C13/00;G06F1/06;H01L29/66 |
主分类号 |
H01L29/786 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device comprising:
a first insulating layer; a first oxide insulating layer over the first insulating layer; an oxide semiconductor layer over the first oxide insulating layer; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a second oxide insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a gate insulating layer over the second oxide insulating layer; a gate electrode layer over the gate insulating layer; a second insulating layer over the first insulating layer, the source electrode layer, the drain electrode layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer; and a third insulating layer over the first insulating layer, the source electrode layer, the drain electrode layer, and the second insulating layer, wherein the second insulating layer comprises a region in contact with a side surface of the gate insulating layer. |
地址 |
Atsugi-shi JP |