| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a technique in which a clock synchronization circuit of a demodulation circuit of radio communication is configured of only digital circuits. <P>SOLUTION: The clock synchronization circuit (101) comprises: a clock generating circuit (6) for generating a sampling clock for sampling a reception signal from an output of a local oscillator (2); a phase error detection circuit (20) for acquiring a phase error between a sampling timing of the sampling clock and an ideal sampling timing; and a timing correction circuit (7) for acquiring a correction amount for correcting a frequency error between a frequency of the sampling clock and a frequency of the ideal sampling timing, and the phase error for each sampling timing of the sampling clock, and for outputting a sampling value at the sampling timing interpolated by the acquired correction amount. <P>COPYRIGHT: (C)2008,JPO&INPIT |
