发明名称 Method for controlling semiconductor processing apparatus
摘要 Occurrence of a process abnormality in a semiconductor processing apparatus is obtained by obtaining an index of a processing size of each of wafers within an X-th lot, in which the X represents an integer, based on data obtained during processing of each of the wafers of the X-th lot, obtaining an index of a processing size of each of wafers within an X+1-th lot, based on data thereof and anticipating an index of a processing sizes of each of wafers within an X+2-th lot, based on the index obtained as to each of the wafers of the X-th lot and the X+1-th lot. A process abnormality occurring during the processing of a wafer of the X+2-th lot is anticipated when the anticipated index of the X+2-th lot exceeds an allowance range.
申请公布号 US2006129264(A1) 申请公布日期 2006.06.15
申请号 US20060339712 申请日期 2006.01.26
申请人 TANAKA JUNICHI;YAMAMOTO HIDEYUKI;IKUHARA SHOJI;KAGOSHIMA AKIRA 发明人 TANAKA JUNICHI;YAMAMOTO HIDEYUKI;IKUHARA SHOJI;KAGOSHIMA AKIRA
分类号 G06F19/00;H01L21/00 主分类号 G06F19/00
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