发明名称 TAB TAPE AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To miniaturize a semiconductor package, such as a tape carrier package, by reducing a test pad region without changing the direction of a semiconductor chip. SOLUTION: The arrangement region of a test pad used for inspection can be optimized by arranging an input test pad 20a at a pattern region adjacent to the space area of the arrangement region (group 21) of an output test pad 10, thus miniaturizing the semiconductor package. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006228761(A) 申请公布日期 2006.08.31
申请号 JP20050037009 申请日期 2005.02.15
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HIRAE KOUICHI
分类号 H01L21/60;H01L23/12 主分类号 H01L21/60
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