发明名称 BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 2/15 AND 256-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
摘要 A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
申请公布号 US2016241263(A1) 申请公布日期 2016.08.18
申请号 US201514639646 申请日期 2015.03.05
申请人 Electronics and Telecommunications Research Institute 发明人 PARK Sung-Ik;KWON Sun-Hyoung;LEE Jae-Young;KIM Heung-Mook;HUR Nam-Ho
分类号 H03M13/27;H03M13/11 主分类号 H03M13/27
代理机构 代理人
主权项 1. A bit interleaver, comprising: a first memory configured to store a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15; a processor configured to generate an interleaved codeword by interleaving the LDPC codeword on a bit group basis, the size of the bit group corresponding to a parallel factor of the LDPC codeword; and a second memory configured to provide the interleaved codeword to a modulator for 256-symbol mapping.
地址 Daejeon KR