Graphics processing circuit having second vertex shader configured to reuse output of first vertex shader and/or process repacked vertex thread group and related graphics processing method thereof

摘要

A graphics processing circuit includes a buffer, a first vertex shader, and a second vertex shader. The first vertex shader generates at least coordinate values of a plurality of vertices to the buffer. The second vertex shader reads at least a portion of buffered coordinate values from the buffer, and reuses at least the portion of the buffered coordinate values to generate a value of at least one user-defined variable.

主权项

1. A graphics processing circuit, comprising:
a buffer; a first vertex shader, configured to generate at least coordinate values of a plurality of vertices to the buffer; a second vertex shader, configured to read at least a portion of buffered coordinate values from the buffer, and reuse at least the portion of the buffered coordinate values to generate a value of at least one user-defined variable; and a primitive culling circuit, configured to reject at least one primitive and instruct the buffer to reject vertices associated with the at least one rejected primitive by removing buffered coordinate values of the rejected vertices.