发明名称 MULTIPLYING ANALOG TO DIGITAL CONVERTER AND METHOD
摘要 A multiplying analog to digital converter (ADC) including a successive-approximation-register (SAR) analog to digital converter (ADC) having a sample input and a feedback input and an ADC output configured with a feedback path configured to couple the ADC output to a digital to analog converter. A feedback attenuator is disposed in the feedback path, the feedback attenuator being configured to attenuate a feedback signal coupled to the feedback input, the feedback attenuator being configured to provide analog multiplication observed at the ADC output. A barrel shifter is configured to provide digital multiplication of the ADC output. The feedback attenuator may be configured as a divider network. The feedback attenuator may be configured to provide attenuation using only passive components. The feedback attenuator may be configured as a capacitive divider network. The feedback attenuator may be configured to provide attenuation ranging between 1 and 0.5.
申请公布号 US2016248437(A1) 申请公布日期 2016.08.25
申请号 US201615049752 申请日期 2016.02.22
申请人 Zhang Jintao;Wang Zhuo;Verma Naveen 发明人 Zhang Jintao;Wang Zhuo;Verma Naveen
分类号 H03M1/44 主分类号 H03M1/44
代理机构 代理人
主权项 1. A multiplying analog to digital converter comprising: a successive-approximation-register (SAR) analog to digital converter (ADC) having a sample input and a feedback input and an ADC output configured with a feedback path configured to couple the ADC output to a digital to analog converter; a feedback attenuator disposed in the feedback path, the feedback attenuator being configured to attenuate a feedback signal coupled to the feedback input, the feedback attenuator being configured to provide analog multiplication observed at the ADC output; and a barrel shifter configured to provide digital multiplication of the ADC output.
地址 Princeton NJ US