发明名称 |
Self-aligned LDD poly-Si thin-film transistor |
摘要 |
A method of fabricating a polysilicon thin film transistor with a self-aligned lightly doped drain (LDD) is described. At first a polysilicon-island region and a gate insulating layer are subsequently formed on a glass substrate performed by a pre-treatment. Then a metal layer and a cap layer are subsequently formed on the gate insulating layer. The cap layer and the metal layer are defined to form a gate. A heavily doped region is formed in the polysilicon island region with serving the gate as a mask. An activation step is performed on the heavily doped region and a sidewall of the metal layer. The cap layer above the metal layer and the sidewall of the metal layer performed by the activation step are removed. A lightly doped region is formed in the polysilicon-island region with serving the remaining metal layer.
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申请公布号 |
US2002168808(A1) |
申请公布日期 |
2002.11.14 |
申请号 |
US20010850058 |
申请日期 |
2001.05.08 |
申请人 |
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE |
发明人 |
CHEN CHIH-CHIANG;CHANG JIUN-JYE;CHUANG CHING-SANG |
分类号 |
H01L21/336;H01L29/786;(IPC1-7):H01L21/00;H01L21/84 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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