| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device which can be suppressed with charging accompanying a plasma treatment by a simple configuration with less dominant area, and also to provide its manufacturing method. SOLUTION: An interlayer insulation layer 17 covers MOSFET Q1 and is formed with holes 18t and 18d by being penetrated at predetermined parts. The hole 18t is one for interconnection, and is embedded with an interconnection plug member 19t and has its lower end connected to a gate electrode 14. An interconnection pattern 21 is connected to the upper end of the interconnection plug member 19t. Meanwhile, the hole 18d is a dummy one, is embedded with a dummy plug member 19d, and has its lower end connected to a substrate contact region 12 of a semiconductor substrate 10. At the time of dry etching of an interconnection layer M1 (indicated by a dashed line) for formation of the interconnection pattern 21, the dummy plug member 19d serves for a path for discharging plasma charge. COPYRIGHT: (C)2007,JPO&INPIT |
