发明名称 INTERFACE CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an interface circuit capable of reducing power consumption at the time of low power consumption when data communication is not performed. <P>SOLUTION: A switching power supply circuit 10 is provided to stabilize the voltage level of a VBUS terminal 1 to 0V and 5V, a change detecting part 13 is configured so as to be able to detect the rise or the fall of a signal from the VBUS terminal 1 and an ID terminal 2 without using a clock signal from an oscillation circuit 6, and the operation of the oscillation circuit 6 is stopped at the time of low power consumption. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2006268386(A) 申请公布日期 2006.10.05
申请号 JP20050085079 申请日期 2005.03.24
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KIHARA HIDEYUKI;SAKAGAMI OAKI
分类号 G06F3/00;G06F1/32;H04L29/00 主分类号 G06F3/00
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