Bit error rate mapping in a memory system

摘要

A memory system or flash memory device may include identify a bit error rate (BER) mapping for the memory. The BER mapping may be used for identifying erroneous bits, managing them, and using them for the system maintenance and system recovery. A complete BER map may be stored in main memory while a cached version of the BER map may be stored in random access memory (RAM). The cached version may identify only the top and bottom bits rather than the complete map. The cached BER map may be updated based on future reads and future programming may rely on the cached BER map for selecting blocks to program.

主权项

1. A memory device comprising:
a non-volatile storage having memory blocks storing data; and a controller in communication with the non-volatile storage, the controller is configured to:
generate a bit error rate mapping that identifies an error rate for the memory blocks, wherein the bit error rate mapping is stored in the non-volatile storage; andstore a partial bit error rate mapping in cache that is a subset of the bit error rate mapping stored in the non-volatile storage, wherein the partial bit error rate mapping identifies an error rate for a portion of the memory blocks with a higher error rate and identifies an error rate for a portion of the memory blocks with a lower error rate.