发明名称 MIXED REDUNDANCY SCHEME FOR INTER-DIE INTERCONNECTS IN A MULTICHIP PACKAGE
摘要 Integrated circuit packages with multiple integrated circuit dies are provided. A multichip package may include a master die that is coupled to one or more slave dies via inter-die package interconnects. A mixed (i.e., active and passive) interconnect redundancy scheme may be implemented to help repair potentially faulty interconnects to improve assembly yield. Interconnects that carry normal user signals may be repaired using an active redundancy scheme by selectively switching into use a spare driver block when necessary. On the other hand, interconnects that carry power-on-reset signals, initialization signals, and other critical control signals for synchronizing the operation between the master and slave dies may be supported using a passive redundancy scheme by using two or more duplicate wires for each critical signal.
申请公布号 EP3104277(A1) 申请公布日期 2016.12.14
申请号 EP20160172421 申请日期 2016.06.01
申请人 Altera Corporation 发明人 How, Dana;Patil, Dinesh;Rahman, Arifur;Schulz, Jeffrey Erik
分类号 G06F11/16;G06F11/18;G06F11/20 主分类号 G06F11/16
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