IMMUNITY TO INLINE CHARGING DAMAGE IN CIRCUIT DESIGNS

摘要

Approaches for checking a design of an integrated circuit using an antenna rule are provided. A method includes determining a figure of merit for a transistor based on a resistance of a shunt path of the transistor relative to the size of the antenna and the size of the transistor. The method also includes comparing the determined figure of merit to a limit. The method further includes deeming the transistor to pass the antenna rule when the figure of merit is less than the limit, and deeming the transistor to fail the antenna rule when the figure of merit is greater than the limit. The determining and the comparing are performed by a computer device.

主权项

1. A method of checking a design of an integrated circuit using an antenna rule, comprising:
checking a subset of a plurality of transistors of the design of the integrated circuit using the antenna rule, wherein the checking comprises for each respective transistor in the subset:
determining, by a computer device, a resistance of a gate path of the respective transistor;determining, by the computer device, a resistance of a source/drain path of the respective transistor;determining, by the computer device, a resistance of a shunt path of the respective transistor;determining, by the computer device, a figure of merit for the respective transistor based on the resistance of the shunt path, the resistance of the gate path, and the resistance of the source/drain path; andcomparing, by the computer device, the figure of merit for the respective transistor to a limit.