发明名称 |
Memory device and its manufacturing method |
摘要 |
<p>Disclosed is a memory device comprising: a semiconductor layer; a source formed in the semiconductor layer; a drain formed in the semiconductor layer, the drain being separated from the source; a gate dielectric layer formed on the semiconductor layer, the gate dielectric layer being formed between the source and the drain; a first gate electrode formed on the gate dielectric layer; a dielectric layer formed below the semiconductor layer; a second gate electrode formed below the dielectric layer; and a ferroelectric capacitor electrically connected to the second gate electrode.
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申请公布号 |
EP1603164(A3) |
申请公布日期 |
2007.01.03 |
申请号 |
EP20050011305 |
申请日期 |
2005.05.25 |
申请人 |
SEIKO EPSON CORPORATION |
发明人 |
KIJIMA, TAKESHI;INOUE, SATOSHI |
分类号 |
H01L27/115;G11C11/22;H01L21/8246;H01L21/84;H01L27/12;H01L29/51;H01L29/78 |
主分类号 |
H01L27/115 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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