发明名称 Implementing vertical signal repeater transistors utilizing wire vias as gate nodes
摘要 A method and structures are provided for implementing vertical transistors utilizing wire vias as gate nodes. The vertical transistors are high performance transistors fabricated up in the stack between the planes of the global signal routing wire, for example, used as vertical signal repeater transistors. An existing via or a supplemental vertical via between wire planes provides both an electrical connection and the gate node of the novel vertical transistor.
申请公布号 US8395186(B2) 申请公布日期 2013.03.12
申请号 US201113005059 申请日期 2011.01.12
申请人 ERICKSON KARL R.;PAONE PHIL C.;PAULSEN DAVID P.;SHEETS, II JOHN E.;UHLMANN GREGORY J.;WILLIAMS KELLY L.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ERICKSON KARL R.;PAONE PHIL C.;PAULSEN DAVID P.;SHEETS, II JOHN E.;UHLMANN GREGORY J.;WILLIAMS KELLY L.
分类号 H01L21/00 主分类号 H01L21/00
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