发明名称 |
A/D CONVERTER AND READING CIRCUIT |
摘要 |
An A/D convert (11) performs sampling of a signal (S1) by a plurality of times during a period (T1) and sampling of a signal (S2) by a plurality of times during a period (T2). During the period (T2), the A/D conversion circuit (17) provides a digital signal in accordance with a signal from an output (15b) of a gain stage (15). The digital signal may have a value "1" or a value "0". The A/D conversion circuit (17) includes a circuit (18) which provides a signal S<SUB>A/DM</SUB> corresponding to the number of appearances of the value "1". A switch (24) operates in response to the clock fs and is used to sample the signal from a pixel (2a). A capacity circuit (27) includes a switch (29) and a capacitor (31) between an inversion input (23a) and a non-inversion output (23b). The switch (29) operates in response to clockf3 and is used for integration to the capacitor (31). |
申请公布号 |
WO2008016049(A1) |
申请公布日期 |
2008.02.07 |
申请号 |
WO2007JP64986 |
申请日期 |
2007.07.31 |
申请人 |
NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITY;KAWAHITO, SHOJI |
发明人 |
KAWAHITO, SHOJI |
分类号 |
H03M1/14;H03M1/08;H04N5/217;H04N5/357;H04N5/378 |
主分类号 |
H03M1/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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