发明名称 MEMORY CONTROLLER, NON-VOLATILE STORAGE DEVICE, NON-VOLATILE STORAGE SYSTEM, AND MEMORY CONTROL METHOD
摘要 A memory controller includes: a memory that holds a physical block counter including the number of erase times, a logical block counter including the number of write times, and a logical-physical conversion table; and a control unit that writes data to any physical block address. When the control unit receives a writing data instruction, the control unit updates the number of write times corresponding to the write destination logical block address, if the number of write times corresponding to the write destination logical block address is large, the control unit allocates to the write destination logical block address a physical block address with the number of erase times which is small among spare blocks not allocated to the logical block addresses in the logical-physical conversion table, updates the number of erase times corresponding to the allocated physical block address, and updates the logical-physical conversion table.
申请公布号 US2016283163(A1) 申请公布日期 2016.09.29
申请号 US201615079901 申请日期 2016.03.24
申请人 Panasonic Intellectual Property Management Co., Ltd. 发明人 SO Hirokazu;HONDA Toshiyuki;KOGITA Shigekazu
分类号 G06F3/06 主分类号 G06F3/06
代理机构 代理人
主权项 1. A memory controller writing data to a non-volatile memory having a plurality of physical blocks, and reading data from the non-volatile memory, the memory controller comprising: a memory configured to hold a physical block counter recording the number of erase times for each of the plurality of physical blocks, a logical block counter recording the number of write times for each of a plurality of logical blocks, and a logical-physical conversion table recording a correspondence between logical block addresses of the plurality of logical blocks and physical block addresses of the plurality of physical blocks; a control unit configured to manage the physical block counter, the logical block counter, and the logical-physical conversion table, and to write data to any physical block address among the physical block addresses corresponding to a predetermined logical block address among the logical block addresses based on the logical-physical conversion table; and a host interface configured to connect to an external device, and to transmit data and receive data, wherein when the control unit receives a writing data instruction including a write destination logical block address from the host interface, the control unit updates the number of write times corresponding to the write destination logical block address in the logical block counter, andif the number of write times corresponding to the write destination logical block address in the logical block counter is relatively large, the control unit allocates to the write destination logical block address a physical block address with the number of erase times which is relatively small in the physical block counter, among spare blocks not allocated to the logical block addresses in the logical-physical conversion table, updates the number of erase times corresponding to the allocated physical block address in the physical block counter, and updates the logical-physical conversion table, and wherein, if a state of the external device is changed, the control unit resets the number of write times in the logical block counter to a predetermined value.
地址 Osaka JP
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