Memory system for mirroring data

摘要

A memory system is disclosed, which may include a memory unit of a first type, susceptible to loss of data from corrupting events, and a memory unit of a second type, less susceptible to loss of data from corrupting events than the memory unit of the first type, and a mirrored memory interface (MMI). The MMI may be coupled to a memory controller, the memory unit of the first type, and the memory unit of the second type. The MMI may, in response to a memory controller write command, receive data from the memory controller and write the data to the memory unit of the first type and to the memory unit of the second type. The MMI may also, in response to a memory controller read command, read data from the memory unit of the first type and send the data to the memory controller.

主权项

1. A memory system comprising:
a first memory unit of a first type that is a volatile memory susceptible to a loss of data in response to a loss of a power supply voltage supplying power to the memory system; a second memory unit of a second type that is a non-volatile memory less susceptible to the loss of data in response to the loss of the power supply voltage than the first memory unit; and a mirrored memory interface coupled to:
a memory controller, through a first memory bus;the first memory unit, through a second memory bus; andthe second memory unit through a third memory bus; the mirrored memory interface configured to:
in response to receiving a write command from the memory controller, receive data from the memory controller and write the data into the first memory unit and into the second memory unit, wherein the received data is continuously mirrored in the first and second memory units so that the first memory unit contains a duplicate copy of all the data in the second memory unit, and the second memory unit contains the duplicate copy of all the data in the first memory unit; andin response to receiving a read command from the memory controller, read data from one of the first memory unit or the second memory unit and send the data read from the first or second memory unit to the memory controller; wherein the second memory bus has a first throughput rate, the third memory bus has a second throughput rate lower than the first throughput rate, writing the data into the first memory unit comprises writing uncompressed data into the first memory unit at the first throughput rate, and writing the data into the second memory unit comprises compressing the data to reduce a memory bandwidth requirement of the third memory bus so that the data is written into the second memory unit at an effective throughput rate equal to the first throughput rate.