System and method for executing sequential code using a group of threads and single-instruction, multiple-thread processor incorporating the same

摘要

A system and method for executing sequential code in the context of a single-instruction, multiple-thread (SIMT) processor. In one embodiment, the system includes: (1) a pipeline control unit operable to create a group of counterpart threads of the sequential code, one of the counterpart threads being a master thread, remaining ones of the counterpart threads being slave threads and (2) lanes operable to: (2a) execute certain instructions of the sequential code only in the master thread, corresponding instructions in the slave threads being predicated upon the certain instructions and (2b) broadcast branch conditions in the master thread to the slave threads.

主权项

1. A system for executing sequential code, comprising:
a pipeline control unit configured to create a group of counterpart threads of said sequential code in a single instruction, multiple thread (SIMT) processor, one of said counterpart threads being a master thread, remaining ones of said counterpart threads being slave threads; and lanes configured to:
execute certain instructions of said sequential code only in said master thread, corresponding instructions in said slave threads being predicated upon said certain instructions, andbroadcast branch conditions in said master thread to said slave threads,wherein all of said lanes of said SIMT processor execute in lock-step.