发明名称 Handling Instructions that Require Adding Results of a Plurality of Multiplications
摘要 Floating point compound equations that involve addition of at least three terms, where each term involves a multiplication, can be implemented by using a bypass to prevent small, remaining values from being lost when shifted.
申请公布号 US2016378432(A1) 申请公布日期 2016.12.29
申请号 US201514749838 申请日期 2015.06.25
申请人 Intel Corporation 发明人 Maiyuran Subramaniam;Garcia Pabon Jorge F.;Garg Ashutosh
分类号 G06F7/485 主分类号 G06F7/485
代理机构 代理人
主权项 1. A method comprising: receiving at least three multiplied floating point terms; sorting the floating point numbers based on exponent size; and bypassing addition of lower bits of a smallest exponent term to present the lower bits as an output.
地址 Santa Clara CA US