HARDWARE BASED COHERENCY BETWEEN A DATA PROCESSING DEVICE AND INTERCONNECT

摘要

There is provided a data processing device including an output port to transmit a request value to an interconnect arranged to implement a coherency protocol, to indicate a request to be subjected to the coherency protocol. An input port receives an acknowledgement value from the interconnect in response to the request value and coherency administration circuitry defines behaviour rules for the data processing device in accordance with the coherency protocol and in dependence on the request value and the acknowledgement value. Storage circuitry administers data in accordance with the behaviour rules. There is also provided an interconnect including an input port to receive a request value, issued by a data processing device having storage circuitry, to indicate a request for the data processing to be subjected to a coherency protocol. An output port transmits an acknowledgement value to the data processing device in response to the request value and coherency administration circuitry defines behaviour rules for the interconnect in accordance with the coherency protocol and in dependence on the request value and the acknowledgement value.

主权项

1. A data processing device comprising:
an output port to transmit a request value to an interconnect arranged to implement a coherency protocol, to indicate a request to be subjected to the coherency protocol; an input port to receive an acknowledgement value from the interconnect in response to the request value; coherency administration circuitry to define behaviour rules for the data processing device in accordance with the coherency protocol and in dependence on the request value and the acknowledgement value; and storage circuitry to administer data in accordance with the behaviour rules.