| 摘要 |
SPIN FET and magnetic reluctance element are provided to reduce the resistance of the stack architecture of the magnetic material/tunnel barrier/semiconductor and to improve the spin movement. The spin FET comprises source/drain regions (13,14), and the channel region and the gate electrode(16). The channel region is positioned between the source and drain region. The gate electrode is positioned on the channel region. Each source and drain region comprise the stack architecture. The stack architecture is comprised of the work function material and the low ferromagnetic material. The low work function material is the non-oxide consisting of Mg, K, and one among Ca and SC or the alloy including non-oxide. |
