发明名称 Three dimensional device intergration method and intergrated device
摘要 A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed. A conductor array having a plurality of contact structures may be formed on an exposed surface of the semiconductor device, vias may be formed through the semiconductor device to device regions, and interconnection may be formed between said device regions and said contact structures.
申请公布号 US2002094661(A1) 申请公布日期 2002.07.18
申请号 US20010011432 申请日期 2001.12.11
申请人 ZIPTRONIX 发明人 ENQUIST PAUL M.;FOUNTAIN GAIUS
分类号 H01L21/331;H01L21/02;H01L21/20;H01L21/60;H01L21/768;H01L21/822;H01L21/8234;H01L21/8238;H01L21/98;H01L27/00;H01L27/04;H01L27/088;H01L27/092;H01L29/737;(IPC1-7):H01L21/30;H01L21/46 主分类号 H01L21/331
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