发明名称 |
STRUCTURE FOR REDUNDANCY PROGRAMMING OF A MEMORY DEVICE |
摘要 |
A design structure for implementing redundancy programming in a memory macro of an integrated circuit chip. It is assumed that all fails are row fails until determined to be bitline fails, circuit means for implementing a method wherein it is assumed that all fails are row fails until determined to be bitline fails and test patterns are passed back to the failure detecting circuit when a wordline destination of the test patterns has previously been determined to be failing, and the test patterns and resultant patterns are passed between the memory macro and a test engine via logic paths connecting the memory macro to other circuits in said integrated circuit chip.
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申请公布号 |
US2008170448(A1) |
申请公布日期 |
2008.07.17 |
申请号 |
US20080046508 |
申请日期 |
2008.03.12 |
申请人 |
BARTH JOHN EDWARD;GORMAN KEVIN WILLIAM |
发明人 |
BARTH JOHN EDWARD;GORMAN KEVIN WILLIAM |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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