Polymer Memory

摘要

A integrated circuit device with a polymer memory array includes active circuits formed in lower layers of a multi-level interconnect structure and a semiconductor substrate and also includes an array of polymer memory cells formed in an upper interconnect level having a plurality of cell node electrodes and source line electrodes for the polymer memory array, each polymer memory cell including a passive layer having at least one conductivity-facilitating compound that is formed on top and sidewall surfaces of a source line electrode, and an active layer having an impedance state that can change that is formed on top and sidewall surfaces of an adjacent cell node electrode with sufficient thickness to make direct physical contact with the passive layer.

主权项

1. An integrated circuit device comprising:
a semiconductor substrate comprising one or more active circuits; a multi-level interconnect structure formed on the semiconductor substrate, the multi-level interconnect structure comprising an upper interconnect level in which a plurality of cell node electrodes and a plurality of source line electrodes are formed in an array; and an array of polymer memory cells formed in the upper interconnect level, each polymer memory cell comprising:
a passive layer comprising at least one conductivity-facilitating compound that is formed on top and sidewall surfaces of a source line electrode, andan active layer having an impedance state that can change that is formed on top and sidewall surfaces of an adjacent cell node electrode with sufficient thickness to make direct physical contact with the passive layer.