| 摘要 |
<P>PROBLEM TO BE SOLVED: To make same both of writing "0" performance for a memory cell and writing "1" performance independently of variation of processes. <P>SOLUTION: A semiconductor memory storage cell and a memory comprising an array of these storage cells are disclosed. The semiconductor memory storage cell comprises a feedback loop comprising of two devices for storing opposite binary values, and data input and output for inputting data to and outputting data from the two devices, and each of the two devices comprising a power source input, such that each device can be powered independently of the other. <P>COPYRIGHT: (C)2009,JPO&INPIT |
