发明名称 PROCESSING SYSTEM WITH ENCODING FOR PROCESSING MULTIPLE ANALOG SIGNALS
摘要 A system for converting several analog signals to digital signals using a single analog to digital converter. Each of the analog signals is encoded, using multiplication, with a different binary code, and the encoded analog signals are summed, and converted to digital form by an analog to digital converter. Multiple digital data streams are then formed from the digital output stream produced by the analog to digital converter, by forming correlations of the digital output stream with each of the binary codes.
申请公布号 US2016218733(A1) 申请公布日期 2016.07.28
申请号 US201514606391 申请日期 2015.01.27
申请人 RAYTHEON COMPANY 发明人 Thompson Daniel;Marr Harry;Romero Francisco
分类号 H03M1/12 主分类号 H03M1/12
代理机构 代理人
主权项 1. A system for processing a plurality of analog signals, the system comprising: a code generator comprising a plurality of serial digital code outputs, the code generator configured to produce, at the plurality of code outputs, a plurality of orthogonal binary codes, each of the plurality of orthogonal binary codes corresponding to one of the analog signals; a plurality of encoders, each encoder comprising: an analog encoder input connected to receive an analog signal of the plurality of analog signals;a digital encoder input configured to receive a binary encoder input signal, the digital input connected to a code output of the code generator;an analog encoder output for transmitting an analog encoder output signal; anda circuit configured to generate the analog encoder output signal by: multiplying the analog signal received at the analog encoder input by a first analog value when the binary encoder input signal has a first digital value, andmultiplying the analog signal received at the analog encoder input by a second analog value when the binary encoder input signal has a second digital value; and a summing node having a plurality of analog summing inputs and an analog sum output,each analog summing input connected to the analog encoder output of an encoder of the plurality of encoders, andthe summing node configured to produce a signal, at the analog sum output, equal to the sum of the signals at the analog summing inputs.
地址 Waltham MA US