CLOCK DISTRIBUTION SCHEMES WITH WIDE OPERATING VOLTAGE RANGES

摘要

Clock distribution schemes with wide operating voltage ranges are disclosed. In one aspect, an operating voltage level or condition within a computing device is sensed. In a first voltage condition, delay elements are used within a clock tree to minimize clock skew. In a second voltage condition, one or more delay and/or clocked elements are bypassed to minimize clock skew at the second voltage condition. In addition to controlling clock skew, power may be conserved by depowering the bypassed elements. Controlling clock skew in this fashion improves operation of a computing device that includes the clock tree and may improve battery life.

主权项

1. A method of controlling a clock tree within a computing device, comprising:
determining a first voltage condition of an integrated circuit (IC) device from among a plurality of voltage conditions; while the first voltage condition is valid, using a first clock tree configuration to minimize clock skew for a clock tree of the IC device; determining a second voltage condition from among the plurality of voltage conditions; bypassing a clocked cell within the clock tree to generate a second clock tree configuration while in the second voltage condition; and depowering the clocked cell while in the second voltage condition.