发明名称 |
GEOMETRY DEPENDENT VOLTAGE BIASES FOR ASYMMETRIC RESISTIVE MEMORIES |
摘要 |
In one example, a system includes a multi-plane memory array with shared crossbars and memory elements accessed through the shared crossbars and support circuitry. The support circuitry includes a bias multiplexer to determine an orientation of a target memory element in the multi-plane memory array and output voltage biases with a polarity based on the orientation of the target memory element. Methods for generating and applying geometry dependent voltage biases are also provided. |
申请公布号 |
US2016247563(A1) |
申请公布日期 |
2016.08.25 |
申请号 |
US201315030092 |
申请日期 |
2013.10.28 |
申请人 |
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP |
发明人 |
Perner Frederick |
分类号 |
G11C13/00 |
主分类号 |
G11C13/00 |
代理机构 |
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代理人 |
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主权项 |
1. A system comprising:
a multi-plane memory array with shared crossbars and memory elements accessed through the shared crossbars; support circuitry comprising a bias multiplexer to determine an orientation of a target memory element in the multi-plane memory array and output voltage biases with a polarity based on the orientation of the target memory element. |
地址 |
Houston TX US |