SYNCHRONOUS BUS ARCHITECTURE FOR DIGITAL PRE-DISTORTION SYSTEM

摘要

A system for storing pre-distorted output samples in a memory includes a sample counter, a programming interface module, and a comparator. The sample counter counts the pre-distorted output samples, generates a dynamic count value, receives a capture counter status signal, and generates a first count value. The programming interface module receives and outputs the first count value, an offset value, and a capture control signal, and generates a first interrupt signal. The comparator receives the first count value, the offset value, the dynamic count value, and the capture control signal, generates a final value, compares the final value with the dynamic count value, and generates a trigger signal when the final value equals the dynamic count value based on the capture control signal. The trigger signal initiates the storing of the pre-distorted output samples in the memory.

主权项

1. A system for storing a plurality of output samples generated by a digital pre-distorter (DPD) in a memory, comprising:
a sample counter module for counting the plurality of output samples, generating a dynamic count value that is a count of the plurality of output samples, receiving a capture counter status signal, and generating a first count value that is a count of the plurality of output samples based on the capture counter status signal; a programming interface module connected to the sample counter module for receiving and outputting the first count value, receiving and outputting an offset value and a capture control signal, and generating a first interrupt signal based on the first count value, wherein the first interrupt signal indicates the storing of the first count value and the capture control signal enables the storing of the plurality of output samples in the memory, and wherein the offset value and the first count value are collectively indicative of the dynamic count value at which the storing of the plurality of output samples is initiated; and a comparator module connected to the programming interface module for receiving the first count value, the offset value, and the capture control signal and to the sample counter module for receiving the dynamic count value, adding the first count value and the offset value for generating a final value, comparing the final value and the dynamic count value, and generating a trigger signal when the final value equals the dynamic count value based on the capture control signal, wherein the trigger signal initiates the storing of the plurality of output samples in the memory.