发明名称 |
NON-SERIALIZED PUSH INSTRUCTION FOR PUSHING A MESSAGE PAYLOAD FROM A SENDING THREAD TO A RECEIVING THREAD |
摘要 |
In at least some embodiments, a processor core executes a sending thread including a first push instruction and a second push instruction subsequent to the first push instruction in a program order. Each of the first and second push instructions requests that a respective message payload be pushed to a mailbox of a receiving thread. In response to executing the first and second push instructions, the processor core transmits respective first and second co-processor requests to a switch in the data processing system via an interconnect fabric of the data processing system. The processor core transmits the second co-processor request to the switch without regard to acceptance of the first co-processor request by the switch. |
申请公布号 |
US2016179518(A1) |
申请公布日期 |
2016.06.23 |
申请号 |
US201514733496 |
申请日期 |
2015.06.08 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ARIMILLI LAKSHMINARAYANA B.;DRERUP BERNARD C.;GUTHRIE GUY L.;IRISH JOHN D.;STARKE WILLIAM J.;STUECHELI JEFFREY A. |
分类号 |
G06F9/30;G06F13/40 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
1. A method of data processing within a data processing system, the method comprising:
in a processor core, executing a sending thread including a first push instruction and a second push instruction subsequent to the first push instruction in a program order, wherein each of the first and second push instructions requests that a respective message payload be pushed to a mailbox of a receiving thread; in response to executing the first and second push instructions, the processor core transmitting respective first and second co-processor requests to a switch in the data processing system via an interconnect fabric of the data processing system, wherein the transmitting includes the processor core transmitting the second co-processor request to the switch without regard to acceptance of the first co-processor request by the switch. |
地址 |
Armonk NY US |