发明名称 |
INTERCONNECT WIRES INCLUDING RELATIVELY LOW RESISTIVITY CORES |
摘要 |
A dielectric layer and a method of forming thereof. An opening defined in a dielectric layer and a wire deposited within the opening, wherein the wire includes a core material surrounded by a jacket material, wherein the jacket material exhibits a first resistivity &rgr;1 and the core material exhibits a second resistivity &rgr;2 and &rgr;2 is less than &rgr;1. |
申请公布号 |
EP3050081(A1) |
申请公布日期 |
2016.08.03 |
申请号 |
EP20140849833 |
申请日期 |
2014.09.25 |
申请人 |
INTEL CORPORATION |
发明人 |
YOO, HUI JAE;INDUKURI, TEJASWI K.;CHEBIAM, RAMANAN V.;CLARKE, JAMES S. |
分类号 |
H01L21/28;H01L21/60 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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