发明名称 BUILT-IN SELF-TEST CIRCUIT
摘要 A built-in self-test (BIST) circuit is disclosed which integrates the functions of pins for test input data TDI, test output data TDO and an analog input signal VPP into a single digital/analog input/output module, and internally produces a test trigger signal STROBE and a digital-analog conversion signal ANA. In addition, when there is a need to power the test chip with a voltage or current, a data generation circuit of the BIST circuit can generate a digital-analog conversion signal to change an operating mode of the digital/analog input/output module and hence enable the transmission of analog data. According to the present invention, the testing can be performed with only two pins, which leads to an improvement in test efficiency and a reduction in test cost.
申请公布号 US2016306010(A1) 申请公布日期 2016.10.20
申请号 US201514962626 申请日期 2015.12.08
申请人 Shanghai Huahong Grace Semiconductor Manufacturing Corporation 发明人 LI Ming
分类号 G01R31/3177;G01R31/317 主分类号 G01R31/3177
代理机构 代理人
主权项 1. A built-in self-test (BIST) circuit for testing a test chip, comprising: a digital/analog input/output module coupled to the test chip and configured to input digital or analog test input data to the test chip or output digital or analog test output data from the test chip via a first pin; an instruction analysis circuit having a first input terminal for receiving the test input data from the digital/analog input/output module and a second input terminal configured to be coupled to a clock signal via a second pin; and a data generation circuit configured to output a direction control signal and analog-digital conversion data to the digital/analog input/output module based on both the clock signal and a test trigger signal produced by the instruction analysis circuit, the direction control signal configured to instruct the digital/analog input/output module to operate in an input mode or an output mode, the analog-digital conversion data configured to switch the digital/analog input/output module between an analog mode and a digital mode, the data generation circuit further configured to process returned data from the test chip into the test output data and output the test output data to the first pin, wherein the BIST circuit does not comprise other pins than the first pin and the second pin.
地址 Shanghai CN