Non-Temporal Write Combining Using Cache Resources

摘要

A method and apparatus for performing non-temporal write combining using existing cache resources is disclosed. In one embodiment, a method includes executing a first thread on a processor core, the first thread including a first block initialization store (BIS) instruction. A cache query may be performed responsive to the BIS instruction, and if the query results in a cache miss, a cache line may be installed in a cache in an unordered dirty state in which it is exclusively owned by the first thread. The first BIS instruction and one or more additional BIS instructions may write data from the first processor core into the first cache line. After a cache coherence response is received, the state of the first cache line may be changed to an ordered dirty state in which it is no longer exclusive to the first thread.

主权项

1. A method comprising:
executing a first thread on a processor core, wherein executing the first thread includes executing a first block initialization store (BIS) instruction; responsive to executing the first BIS instruction, performing a query of a first cache for a first cache line corresponding to data to be written from the processor core; responsive to a cache miss resulting from the query of the first cache, installing the first cache line in a second cache, wherein the second cache is a higher level cache than the first cache, and wherein installing the first cache line comprises placing the first cache line in an unordered dirty state in which the first cache line is exclusively dedicated to the first thread; writing data from the first processor core into the first cache line responsive to execution of the first BIS instruction and one or more additional BIS instructions; and changing a state of the first cache line to an ordered dirty state responsive to receiving a cache coherence responses, wherein the cache line is not thread exclusive when in the ordered dirty state.