ANALOG FRONT-END CIRCUITRY FOR BIPHASIC STIMULUS SIGNAL DELIVERY FINDING USE IN NEURAL STIMULATION

摘要

Front-end analog circuitry is described based on a sink-regulated H-bridge topology for delivery of biphasic stimulus signals that may be useful in neurostimulation. Stimulus current may be supplied using fully-integrated dynamic voltage supplies (DVSs), which may be controlled in closed-loop to have an output voltage approximately equal to the voltage of the electrode each supplies stimulus to. The stimulus waveform may be regulated by a single, low-voltage current-digital-to-analog converter (current-DAC), which can safely interface with the electrodes (which may be at high voltages) via high-voltage adapter (HVA) circuits. Example analog front-end circuitry may utilize the balancing stimulus current to discharge the electrode-tissue interface impedance (ZE). In some examples, only after full (or sufficient) ZE discharge has been detected is a DVS used to supply the remaining balancing stimulus.

主权项

1. Analog front-end circuitry comprising:
a first current driver circuit comprising a first switched-capacitor power supply configured to produce a first high voltage; a second current driver circuit comprising a second switched-capacitor power supply configured to produce a second high voltage; and a first switch between the first current driver circuit and a first node; a second switch between the second current driver circuit and a second node; a first high voltage adapter circuit coupled to the first node; a second high voltage adapter circuit coupled to the second node; a current digital-to-analog converter (DAC); a third switch between the first high voltage adapter circuit and the current digital-to-analog converter; a fourth switch between the second high voltage adapter circuit and the current digital-to-analog converter; a fifth switch between the first high voltage adapter circuit and a reference voltage; a sixth switch between the second high voltage adapter circuit and the reference voltage; wherein the first current driver circuit and the second current driver circuit are configured to control at least some of the first, second, third, fourth, fifth, and sixth switches to provide a biphasic voltage signal between the first and second node.