| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit and an error analysis method, providing information of an error occurrence source in a high-speed serial interface such as PCIe. SOLUTION: When an error occurs on the PCIe 6, an image processor 1 stores address information stored in a register 3b of a PCIe root complex 3a of a MCH (Memory Controller Hub) 3, and a register 18 on a PCIe end point 16 that is a register on the PCIe 6 in a debugging register 17 of a debug circuit 15 inside an ASIC (Application Specific Integrated Circuit) 5, stores ID information included in a request into the debugging register 17 when processing wherein the error occurs is reproduced and when a request to an address of the debugging register 17 occurs from DMA (Direct Memory Access) 11a-13b, and outputs the information of the error occurrence source specified from an ID information stored in the debugging register 17 from an external terminal 23 when the error occurs in the error reproduction processing. COPYRIGHT: (C)2008,JPO&INPIT
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