DATA-DEPENDENT SELF-BIASED DIFFERENTIAL SENSE AMPLIFIER

摘要

A system and method of operating a twin-transistor single bit multi-time programmable memory cell to provide a high gain, sensing scheme for small signals. The memory cell includes a pair of a first transistor and a second transistor providing a differential signal output. The first transistor of the memory cell couples a first circuit leg having a first current source load transistor and the second transistor couples a second circuit leg having a second current source load transistor. A programmed value is represented by a voltage threshold shift in one of the first or second transistors. A feedback circuit receives one of: a first signal or a second signal of the differential signals, and generates, in response, a feedback signal which is simultaneously applied to bias each current source load transistor in each the first and second circuit legs to amplify a voltage differential between the differential signal outputs.

主权项

1. An apparatus for operating a multi-time programmable bit cell providing a differential signal output comprising:
a feedback circuit for receiving one of: a first signal or a second signal of said differential signal output, said feedback circuit generating, responsive to the first or the second signal, a negative feedback signal, said feedback circuit applying said negative feedback signal to bias a current source load transistor connected in series with said programmable bit cell, said biasing said connected series current source load transistor used to amplify a voltage differential between said first signal and said second signal of said differential signal output such that a programmed threshold voltage Vt shift in the cell is detected; and a cross-coupled sense amplifier for receiving said amplified voltage differential between said first and said second signal of said differential signal output and outputting a corresponding logic value.