发明名称 |
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE CONTROL METHOD |
摘要 |
There is provided a semiconductor device including (1) a first power source section that includes a first power source output terminal and a second power source output terminal that output voltages at mutually different voltage levels, (2) a first output section that includes a first output stage switch that is provided between the first power source output terminal and a first voltage output terminal, and a second output stage switch that is provided between the second power source output terminal and the first power source output terminal, and (3) a controller that performs ON/OFF control of the first output stage switch and the second output stage switch such that both the first output stage switch and the second output stage switch are in an OFF state over a predetermined period encompassing a point in time when a signal level of the first signal switches. |
申请公布号 |
US2016285455(A1) |
申请公布日期 |
2016.09.29 |
申请号 |
US201615081154 |
申请日期 |
2016.03.25 |
申请人 |
LAPIS SEMICONDUCTOR CO., LTD. |
发明人 |
YAMASHITA TAKASHI |
分类号 |
H03K19/0185 |
主分类号 |
H03K19/0185 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device comprising:
a first power source section that includes a first power source output terminal and a second power source output terminal that output voltages at mutually different voltage levels, the first power source section changing the respective voltage levels output from the first power source output terminal and the second power source output terminal according to switching of a signal level of a first signal; a first output section that includes a first output stage switch that is provided between the first power source output terminal and a first voltage output terminal, and a second output stage switch that is provided between the second power source output terminal and the first power source output terminal; and a controller that performs ON/OFF control of the first output stage switch and the second output stage switch such that both the first output stage switch and the second output stage switch are in an OFF state over a predetermined period encompassing a point in time when a signal level of the first signal switches. |
地址 |
Kanagawa JP |