发明名称 |
Memory Control Circuit, Nonvolatile Storage Apparatus, and Memory Control Method |
摘要 |
An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.
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申请公布号 |
US2008049504(A1) |
申请公布日期 |
2008.02.28 |
申请号 |
US20050568564 |
申请日期 |
2005.05.12 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
KASAHARA TETSUSHI;IZUMI TOMOAKI;NAKANISHI MASAHIRO;TAMURA KAZUAKI;MATSUNO KIMINORI;INAGAKI YOSHIHISA;INOUE MANABU |
分类号 |
G11C16/06;G06F12/16 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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