| 摘要 |
<p>It is possible to suppress the voltage amplitudes of data lines and to prevent deterioration in display quality by a simple configuration.</p><p>Each of pixels 110 includes a pixel capacitor and a storage capacitor of which one end is connected to a pixel electrode and the other end is connected to each capacitive line 132. If first, second, third, ..., 320th, and 321st scanning lines 112 are sequentially selected, the capacitive line 132 of each row is provided with TFTs 152, 154, 156 and 158. A source electrode of the TFT 156 of a first row is connected to a first feed line 165 and a gate electrode thereof is connected to a first scanning line 112. A source electrode of the TFT 158 is connected to a second feed line 167 and a gate electrode thereof is connected to a common drain electrode of the TFTs 152 and 154. The drain electrodes of the TFT 156 and 158 are connected to the first capacitive line 132. A gate electrode of the TFT 152 is connected to a second scanning line 112.
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