发明名称 MULTI-HIERARCHY INTERCONNECT SYSTEM AND METHOD FOR CACHE SYSTEM
摘要 A multi-hierarchy interconnect system for a cache system having a tag memory and a data memory includes an address interconnect scheduling device and a data interconnect scheduling device. The address interconnect scheduling device performs a tag bank arbitration to schedule address requests to a plurality of tag banks of the tag memory. The data interconnect scheduling device performs a data bank arbitration to schedule data requests to a plurality of data banks of the data memory. Besides, a multi-hierarchy interconnect method for a cache system having a tag memory and a data memory includes: performing a tag bank arbitration to schedule address requests to a plurality of tag banks of the tag memory, and performing a data bank arbitration to schedule data requests to a plurality of data banks of the data memory.
申请公布号 EP2992440(A4) 申请公布日期 2016.12.07
申请号 EP20140791227 申请日期 2014.04.25
申请人 MediaTek Singapore Pte. Ltd. 发明人 HUANG, Hsilin
分类号 G06F13/32 主分类号 G06F13/32
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