发明名称 MANUFACTURING METHOD OF THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND THIN-FILM TRANSISTOR ARRAY SUBSTRATE THEREOF
摘要 Provided is a method of manufacturing TFT substrate, the method including: forming a first conductive layer and a gate electrode; forming a gate insulating layer covering the first conductive layer and the gate electrode; forming a first contact hole exposing the first conductive layer through the gate insulating layer; forming, on the gate insulating layer of a pixel area, an oxide semiconductor pattern comprising a first region which is conductive, a second region which is conductive, and a third region between the first region and the second region; forming a source electrode contacting the first region of the oxide semiconductor pattern, a drain electrode contacting the second region of the oxide semiconductor pattern and a second conductive layer contacting the first conductive layer on a non-pixel area. Each of the first region and the second region overlaps the gate electrode.
申请公布号 US2016300852(A1) 申请公布日期 2016.10.13
申请号 US201514927269 申请日期 2015.10.29
申请人 Samsung Display Co., Ltd. 发明人 Park Junhyun;Kim Sunghwan;Shin Kyoungju;Chai Chongchul
分类号 H01L27/12;H01L29/786 主分类号 H01L27/12
代理机构 代理人
主权项 1. A method of manufacturing a thin film transistor (TFT) substrate, the method comprising: forming a first conductive layer on a non-pixel area of a substrate and a gate electrode on a pixel area of the substrate; forming a gate insulating layer covering the first conductive layer and the gate electrode; forming a first contact hole exposing the first conductive layer through the gate insulating layer; forming, on the gate insulating layer of the pixel area, an oxide semiconductor pattern comprising a first region which is conductive, a second region which is conductive, and a third region between the first region and the second region; forming a source electrode contacting the first region of the oxide semiconductor pattern, a drain electrode contacting the second region of the oxide semiconductor pattern and a second conductive layer contacting the first conductive layer on a non-pixel area, wherein each of the first region and the second region overlaps the gate electrode.
地址 Yongin-City KR